1. Field of the Invention
The present invention relates to digital indication type speedometers, and particularly to improvements in a digital indication type speedometer comprising a speed counter for counting speed pulses emitted in proportion to a vehicle speed for a given gate time, an indication register for latching a value to be indicated commensurate to an output from said speed counter and an indicator for indicating the value latched in said indication register.
2. Prior Art
In general, a digital indication type speedometer for digitally indicating a running speed of a vehicle or the like comprises a speed counter for counting speed pulses emitted in proportion to a vehicle speed through the rotation of a propeller shaft, wheel or the like for a given gate time, an indication register for latching the preceding value counted by the speed counter while the speed counter is counting, and an indicator for indicating the value latched in the indication register. This digital indication type speedometer has such a characteristic feature that the vehicle speed is constantly digitally indicated by the indicator. However, with this speedometer, heretofore, an output of the speed counter has been directly latched in the indication register as a value to be indicated, which is repeatedly indicated by the indicator, thereby a rewriting cycle of an indication is limited to substantially each given gate time, and, in the case the vehicle is stopped from the running condition, although the vehicle is in a stopped condition, zero is not immediately indicated because of the gate time, thus giving a feeling of incompatibility to driver. More specifically, in the case that each of the speed pulses is a 0.5 km/h/pulse and the gate time is 0.28 sec for example, if the vehicle is stopped after the speed pulses are fed upon opening of the gate, although the vehicle is in a stopped condition, it takes about two times the gate time, i.e., 0.56 sec before the indicated speed becomes 0 km/h.
Furthermore, the change in indication is slow during acceleration or deceleration, thus presenting a feeling of incompatibility between the degree of acceleration or deceleration and the change in indication. Whereas, during running at a constant speed, the change in indication is frequently made in accordance with slight changes in the vehicle speed as if it flickers, thereby deteriorating easiness in reading. More specifically, during running at a value between 59 km/h and 60 km/h for example, both of 59 km/h and 60 km/h are alternately indicated. This reaches its worst condition when an intermediate speed between 59 km/h and 60 km/h is set in a cruising speed control device of the vehicle. The shorter the gate time is, the more intense the flickering changes in indication become. Therefore, as a remedy for it, it has been taken into account to extend the gate time. However, if the response during acceleration or deceleration is taken into consideration, there is a limit in extending the gate time. Consequently, heretofore, there has been selected an intermediate value of a gate time in consideration of both factors as described above. However, the value thus selected could satisfy neither the condition during acceleration or deceleration, nor the condition during running at a constant speed.
In order to obviate the disadvantages as described above, it has been considered to change the gate time and the rewriting cycle of indication in accordance with the running conditions of the vehicle. However, the abovedescribed arrangement not only requires an acceleration sensor for sensing the running condition of the vehicle but also makes the after-treatment of signals be complicated, so that the abovedescribed arrangement is not practicable.
The present invention has been developed to obviate the abovedescribed disadvantages of the prior art, and has as its first object the provision of a digital indication type speedometer capable of making satisfactory indications without presenting any feeling of incompatibility in the case vehicle is stopped from running condition.
The present invention has as its second object the provision of a digital indication type speedometer capable of making satisfactory indications without presenting any feeling of incompatibility in all cases including the condition during acceleration or deceleration, the condition during running at a constant speed, and the case vehicle is stopped from running condition, and excellent in easiness in reading.
To accomplish the abovedescribed first object, according to the present invention, a digital indication type speedometer comprising a speed counter for counting speed pulses emitted in proportion to a vehicle speed for a given gate time, an indication register for latching a value to be indicated commensurate to an output from said speed counter and an indicator for indicating the value latched in said indication register is of such an arrangement that a zero indication discriminating circuit is provided which forcibly sets the value latched in the indication register to zero when an emitting interval of the speed pulses exceeds a predetermined period of time, so that, when the vehicle is stopped from the running condition, the indicated value is turned to be zero in a short period of time, thereby making a satisfactory indication presenting no feeling of incompatibility.
To accomplish the second object, according to the present invention, a digital indication type speedometer comprising a speed counter for counting speed pulses emitted in proportion to a vehicle speed for a given gate time, an indication register for latching a value to be indicated commensurate to an output from said speed counter and an indicator for indicating the value latched in said indication register is of such an arrangement that, a hysteresis processing circuit for rewriting the value latched in said indication register in accordance with an output of said speed counter only when a difference between the output of said speed counter and the value latched in said indication register is not within tolerance limit upon comparison therebetween, and a zero indication discriminating circuit for forcibly setting the value latched in said indication register to zero when an emitting interval of the speed pulses exceeds a predetermined period of time, are provided, so that, the indication is changed in a short period of time in accordance with the condition of acceleration or deceleration during acceleration or deceleration of the vehicle, and the indication is momentarily returned to zero when the vehicle is stopped and no flickering of the indication occurs during running at a constant speed, and the satisfactory indication presenting no feeling of incompatibility is obtainable at any time.